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9. Putting It All Together

The following commands will create a ROM image named "a.out" that can be used as the initialization data for the Xilinx Block RAM used for code storage:

$ cc65 -t none -O --cpu 65sc02 main.c
$ ca65 --cpu 65sc02 main.s
$ ca65 --cpu 65sc02 rs232_tx.s
$ ca65 --cpu 65sc02 interrupt.s
$ ca65 --cpu 65sc02 vectors.s
$ ca65 --cpu 65sc02 wait.s
$ ld65 -C sbc.cfg -m interrupt.o vectors.o wait.o rs232_tx.o
          main.o sbc.lib

During the C-level code compilation phase (cc65), assumptions about the target system are disabled via the -t none command line option. During the object module linker phase (ld65), the target customization is enabled via inclusion of the sbc.lib file and the selection of the configuration file via the -C sbc.cfg command line option.

The 65C02 core used most closely matches the cc65 toolset processor named 65SC02 (the 65C02 extensions without the bit manipulation instructions), so all the commands specify the use of that processor via the --cpu 65sc02 option.

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